J05 Wrinting logic samples

Logic values can have up to 16 states. A logic signal might contain just 1 bit value or a vector of bits.

Interface

The interface contains write functions for all supported data types. Additionally you find renamed wrapper functions for scripting purpose.

Logic signals can have up to 16 states:

public final int STATE_0_BITS = 0x0;// L2
public final int STATE_1_BITS = 0x1;// L2
public final int STATE_Z_BITS = 0x2;// L4
public final int STATE_X_BITS = 0x3;// L4
public final int STATE_L_BITS = 0x4;// L16
public final int STATE_H_BITS = 0x5;// L16
public final int STATE_U_BITS = 0x6;// L16
public final int STATE_W_BITS = 0x7;// L16
public final int STATE_D_BITS = 0x8;// L16

public final int STATE_J_BITS = 0x9;// L16
public final int STATE_K_BITS = 0xa;// L16
public final int STATE_M_BITS = 0xb;// L16
public final int STATE_N_BITS = 0xc;// L16
public final int STATE_O_BITS = 0xd;// L16
public final int STATE_P_BITS = 0xe;// L16
public final int STATE_Q_BITS = 0xf;// L16 

The first 9 states are verilog standard. The additional 7 states are free to use. The text representation (upper case and lower case) is:

public final char[] STATE_LC_DIGITS = 
   { '0', '1', 'z', 'x', 'l', 'h', 'u', 'w', '-', 'j', 'k', 'm', 'n', 'o', 'p', 'q' };
public final char[] STATE_UC_DIGITS = 
   { '0', '1', 'Z', 'X', 'L', 'H', 'U', 'W', '-', 'J', 'K', 'M', 'N', 'O', 'P', 'Q' };

Impulse can pack logic signals as single bits, pairs of 2 bits, or groups of 4 bits (nibbles), depending of the logic states used. These modes are called state levels and required to use in the writer interface:

public final int STATE_LEVEL_2 = 0x1;// 1 Bit
public final int STATE_LEVEL_4 = 0x2;// 2 Bits
public final int STATE_LEVEL_16 = 0x3;// 4 Bits
units
Domain position as a multiple of its domain base (e.g. domain base=1ms; units = 100; -> domain value = 100ms). Consecutive calls need to pass a value greater or equal.
conflict
If set to true, impulse will use conflict color (usually red) to paint the sample. Meaning of "conflict is use-case depended.
stateLevel
State packing - see above.
precedingStates
Fills all states preceding the given ones with this value (e.g. the value 0001 shall be given in the form preceidingStates:0 state:1.
states
The given states (without preceding) in different forms (array of states, string)
public interface ILogicSamplesWriter extends ISamplesWriter {

	int getBitWidth(); 
	    
	boolean write(long units, boolean conflict, byte states);
	boolean write(long units, boolean conflict, byte precedingStates, 
    	byte[] states, int start, int length); 
	boolean write(long units, boolean conflict, byte precedingStates, String states);
	boolean write(long units, boolean conflict, Logic value);    
	boolean write(long units, boolean conflict, int stateLevel, byte states);
	boolean write(long units, boolean conflict, int stateLevel, byte precedingStates, 
    	byte states);
	boolean write(long units, boolean conflict, int stateLevel, byte precedingStates, 
    	byte[] states, int start, int length);   
	
	// scripting    
	boolean writeByte(long units, boolean conflict, byte states);
	boolean writeBytesP(long units, boolean conflict, byte precedingStates, 
    	byte[] states, int start, int length); 
	boolean writeStringP(long units, boolean conflict, byte precedingStates, String states);
	boolean writeByteS(long units, boolean conflict, int stateLevel, byte states);
	boolean writeByteSP(long units, boolean conflict, int stateLevel, byte precedingStates, 
    	byte states);
	boolean writeBytesSP(long units, boolean conflict, int stateLevel, byte precedingStates, 
    	byte[] states, int start, int length);   
	boolean writeLogic(long units, boolean conflict, Logic logic);
}		
Open JavaDoc Reference

Signal definition

Below you find an example of how to create a logic bit and a logic vector. The bit vector definition requires a signal descriptor with the required bit size (16).

// Java (reader derived from IRecordGenerator, ISingleDomainRecordGenerator)
Signal signal1 = addSignal(signals, "Logic1", "l1", ProcessType.Discrete, 
                        SignalType.Logic, SignalDescriptor.DEFAULT);

Signal signal2 = addSignal(signals, "Logic2", "l2", ProcessType.Discrete, 
                        SignalType.Logic, SignalDescriptor.BitWidth(8));

// JavaScript (recJs, scripted reader,..)
var signal1 = generator.addSignal(signals, "Logic1", "l1", ProcessType.Discrete, 
                        SignalType.Logic, SignalDescriptor.DEFAULT);
    
var signal2 = generator.addSignal(signals, "Logic2", "l2", ProcessType.Discrete, 
                        SignalType.Logic, SignalDescriptor.BitWidth(8));

Writing samples

Below some examples of using the writer methods for Java and JavaScript. The JavaDoc reference contains additional examples.
// Java (reader derived from IRecordGenerator, ISingleDomainRecordGenerator)
byte states = ILogicStates.STATE_X_BITS; // all bits to X
writer1.write(1000L, true, states);    
 
byte precedingStates = ILogicStates.STATE_0_BITS; // all bits to the left
byte[] states = new  byte[]{ILogicStates.STATE_X_BITS,ILogicStates.STATE_1_BITS}; // defined bits
writer2.write(1000L, true, precedingStates, states,0,2);    

byte precedingStates = ILogicStates.STATE_0_BITS; // all bits to the left
String states = "X1"; // defined bits
writer2.write(1000L, true, precedingStates, states);   

Logic value = Logic.valueOf("uuxx1001");
writer2.write(1000L, true, value);  
     
// JavaScript (recJs, scripted reader,..)
var states = ILogicStates.STATE_X_BITS; // all bits to X
writer1.writeByte(1000, true, states);

var precedingStates = ILogicStates.STATE_0_BITS; // all bits to the left
var states = "X1"; // defined bits
writer2.writeStringP(1000, true, precedingStates, states);

var value = Logic.valueOf("uuxx1001");
writer2.writeLogic(1000, true, value);     
    

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