Below you find a small example tracing logic data (verilog,..). A logic bit is made up by one of the following states:
There a re 2 ways to define a logic signal.
You can use the flxAddSignal/addSignal methods together with the TYPE_LOGIC signal type and a signal descriptor defining the no of bits (e.g. "default<bits=16>"). If the no of bits is not defined, 1 bit is assumed.
The other way is the use of the flxAddScatteredSignal/addScatteredSignal method. With these methods, you can define multiple signals that result into a combined logic vector signal. The name parameter is used for identification. The bit range parameters define how to merge the bits of the scattered signals.
The parameters for writing logic samples (flxWriteLogicTextAt/writeLogicTextAt and flxWriteLogicStatesAt/writeLogicStatesAt) are:
Logic using strings |
Logic using state arrays |
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// logic signals trace.addScope( 1, 0, "Logics", "Scope Description"); trace.addSignal( 2, 1, "bit", "a bit", Flx.TYPE_LOGIC, null); trace.addSignal( 3, 1, "vector", "16 bits", Flx.TYPE_LOGIC, "default<bits=16>"); trace.addScatteredSignal( 4, 1, "scattered", null, Flx.TYPE_LOGIC, null, 0, 1); trace.addScatteredSignal( 5, 1, "scattered", null, Flx.TYPE_LOGIC, null, 2, 5); // open ... // logic data using text boolean odd = ((n&1) != 0); trace.writeLogicTextAt( 2, 0, current , false, Flx.STATE_0_BITS, (odd ? "1" : "0"), 1); trace.writeLogicTextAt( 3, 0, 0, true, Flx.STATE_0_BITS, (odd ? "0011x1" : "111uuu"), 6); trace.writeLogicTextAt( 4, 0, 0, true, Flx.STATE_0_BITS, (odd ? "uu" : "0u"), 2); trace.writeLogicTextAt( 5, 0, 0, true, Flx.STATE_0_BITS, (odd ? "11x1" : "1100"), 4); // logic data using state arrays byte[] states = new byte[]{Flx.STATE_1_BITS,Flx.STATE_1_BITS,Flx.STATE_X_BITS,Flx.STATE_X_BITS}; trace.writeLogicStatesAt( 3, 0, 5 , true, Flx.STATE_U_BITS, states, 4);
// logic signals flxAddScope(trace, 1, 0, "Logics", "Scope Description"); flxAddSignal(trace, 2, 1, "bit", "a bit", FLX_TYPE_LOGIC, 0); flxAddSignal(trace, 3, 1, "vector", "16 bits", FLX_TYPE_LOGIC, "default<bits=16>"); flxAddScatteredSignal(trace, 4, 1, "scattered", 0, FLX_TYPE_LOGIC, 0, 0, 1); flxAddScatteredSignal(trace, 5, 1, "scattered", 0, FLX_TYPE_LOGIC, 0, 2, 5); // open ... // logic data using text flxWriteLogicTextAt(trace, 2, 0, current, 0, FLX_STATE_0_BITS, n & 1 ? "1" : "0", 1, 1); flxWriteLogicTextAt(trace, 3, 0, 0, 1, FLX_STATE_0_BITS, n & 1 ? "0011x1" : "111uuu", 6, 6); flxWriteLogicTextAt(trace, 4, 0, 0, 1, FLX_STATE_0_BITS, n & 1 ? "uu" : "0u", 2, 2); flxWriteLogicTextAt(trace, 5, 0, 0, 1, FLX_STATE_0_BITS, n & 1 ? "11x1" : "1100", 4, 4); // logic data using state arrays flxbyte states[4] = { FLX_STATE_1_BITS, FLX_STATE_1_BITS, FLX_STATE_X_BITS, FLX_STATE_X_BITS }; flxWriteLogicStatesAt(trace, 3, 0, 5, 1, FLX_STATE_U_BITS, states, 4, 4);
# logic signals trace.addScope( 1, 0, "Logics", "Scope Description"); trace.addSignal( 2, 1, "bit", "a bit", Flx.TYPE_LOGIC, None); trace.addSignal( 3, 1, "vector", "16 bits", Flx.TYPE_LOGIC, "default<bits=16>"); trace.addScatteredSignal( 4, 1, "scattered", None, Flx.TYPE_LOGIC, None, 0, 1); trace.addScatteredSignal( 5, 1, "scattered", None, Flx.TYPE_LOGIC, None, 2, 5); # open ... # logic data using text odd = ((n&1) != 0); trace.writeLogicTextAt( 2, 0, current , False, Flx.STATE_0_BITS, ("1" if odd else "0"), 1); trace.writeLogicTextAt( 3, 0, 0, True, Flx.STATE_0_BITS, ("0011x1" if odd else "111uuu"), 6); trace.writeLogicTextAt( 4, 0, 0, True, Flx.STATE_0_BITS, ("uu" if odd else "0u"), 2); trace.writeLogicTextAt( 5, 0, 0, True, Flx.STATE_0_BITS, ("11x1" if odd else "1100"), 4); # logic data using state arrays states = bytearray([Flx.STATE_1_BITS,Flx.STATE_1_BITS,Flx.STATE_X_BITS,Flx.STATE_X_BITS]); trace.writeLogicStatesAt( 3, 0, 5 , True, Flx.STATE_U_BITS, states, 4);
// logic signals trace.addScope(1, 0, "Logics", "Scope Description"); trace.addSignal(2, 1, "bit", "a bit", Flx.TYPE_LOGIC, null); trace.addSignal(3, 1, "vector", "16 bits", Flx.TYPE_LOGIC, "default<bits=16>"); trace.addScatteredSignal(4, 1, "scattered", null, Flx.TYPE_LOGIC, null, 0, 1); trace.addScatteredSignal(5, 1, "scattered", null, Flx.TYPE_LOGIC, null, 2, 5); // open ... // logic data using text let odd : boolean = ((n & 1) !== 0); trace.writeLogicTextAt(2, 0, current, false, Flx.STATE_0_BITS, (odd?"1":"0"), 1); trace.writeLogicTextAt(3, 0, 0, true, Flx.STATE_0_BITS, (odd?"0011x1":"111uuu"), 6); trace.writeLogicTextAt(4, 0, 0, true, Flx.STATE_0_BITS, (odd?"uu":"0u"), 2); trace.writeLogicTextAt(5, 0, 0, true, Flx.STATE_0_BITS, (odd?"11x1":"1100"), 4); // logic data using state arrays let states : number[] = [Flx.STATE_1_BITS, Flx.STATE_1_BITS, Flx.STATE_X_BITS, Flx.STATE_X_BITS]; trace.writeLogicStatesAt(3, 0, 5, true, Flx.STATE_U_BITS, states, 4);
// logic signals trace.addScope(1, 0, "Logics", "Scope Description"); trace.addSignal(2, 1, "bit", "a bit", Flx_1.Flx.TYPE_LOGIC, null); trace.addSignal(3, 1, "vector", "16 bits", Flx_1.Flx.TYPE_LOGIC, "default<bits=16>"); trace.addScatteredSignal(4, 1, "scattered", null, Flx_1.Flx.TYPE_LOGIC, null, 0, 1); trace.addScatteredSignal(5, 1, "scattered", null, Flx_1.Flx.TYPE_LOGIC, null, 2, 5); // open ... // logic data using text let odd = ((n & 1) !== 0); trace.writeLogicTextAt(2, 0, current, false, Flx_1.Flx.STATE_0_BITS, (odd ? "1" : "0"), 1); trace.writeLogicTextAt(3, 0, 0, true, Flx_1.Flx.STATE_0_BITS, (odd ? "0011x1" : "111uuu"), 6); trace.writeLogicTextAt(4, 0, 0, true, Flx_1.Flx.STATE_0_BITS, (odd ? "uu" : "0u"), 2); trace.writeLogicTextAt(5, 0, 0, true, Flx_1.Flx.STATE_0_BITS, (odd ? "11x1" : "1100"), 4); // logic data using state arrays let states = [Flx_1.Flx.STATE_1_BITS, Flx_1.Flx.STATE_1_BITS, Flx_1.Flx.STATE_X_BITS, Flx_1.Flx.STATE_X_BITS]; trace.writeLogicStatesAt(3, 0, 5, true, Flx_1.Flx.STATE_U_BITS, states, 4);