Virtual prototyping has been used in several forms to increase confidence in product design or function. Once the system behaviour and an associated test environment are captured in SystemC, it is possible to reuse that environment as a reference test platform throughout the system implementation work.
SystemC is a set of C++ classes and macros which provide an event-driven simulation interface.
The VP extension comprises the TAB reader (Analogue Tabular Format) used in SystemC AMS systems and the SCV reader for the textual SystemC TLM-2 transaction database.
The VCD format is already supported by the impulse core features.
impulse VP is available with impulse 2.0.x.
Debug and Understand SystemC Implementations
Navigate through VCD hierarchies; filter and search for incidents.
Visualize the TLM-2 Transaction Flow
Display transaction graphs and navigate forwards and backwards.
Extract and Visualize Performance Figures
Display VCD wave forms together with transaction plots. Navigate through the graph of the relationship and display transactions in tabular form.
TAB Reader
This format is used in SystemC AMS systems. The format uses pure text and stores the numeric values in columns similar to CSV.
SCV READER (beta)
With the SCV reader, you can read System-C transaction text database traces. An SCV text database file stores transaction traces in plain text format.
The Analog Tabular Format (TAB) is used in SystemC AMS systems. The format uses pure text and stores the numeric values in columns similar to CSV.
Platforms:
32/64bit
32/64bit
32/64bit
Requirements:
None
Known limitations:
File size limited by virtual memory and temporary storage.
Domain base may not match perfectly (see text above).
Status:
Stable
Operations:
Load
Stream
Parameters:
Domain Base: Preset the domain base (e.g. ms) or use the 'auto' mode (default).
Configuration:
Default Reader Configuration with modified parameters.
SCV Reader
The SystemC Transaction DB (SCV)<
The SCV (SystemC Transaction DB) format is used by the default transaction db writer of the SystemC Verification
Library (TLM transactions).
Platforms:
32/64bit
32/64bit
32/64bit
Requirements:
None
Known limitations:
File size limited by virtual memory and temporary storage.
Status:
Beta
Operations:
Load
Parameters:
None
Configuration:
Default Reader Configuration with modified parameters.
License
impulse end-user license
Native extension converter (C/C++) available in the plugin package
Selected Resources
Simulation
Electronic circuit simulation uses mathematical models to replicate the behaviour of an actual electronic device or circuit. The output of these simulations can be analysed using impulse in many ways. Analysed simulations of analogue and digital systems include: systemC (VCD, TAB, SCV); Verilog, VHDL (VCD, eVCD, LXT2, VZT, FST) and Spice (HSpice, NanoSim, Spice3).